Our Client Currently looking for Senior Engineer – ASIC Design

What you will do :

– Develop ASIC IP blocks and subsystems, contributing to the advancement of 5G and 6G communication technology.

– Take full ownership of a design, whether at the block or subsystem level.

– Generate comprehensive documentation throughout the design lifecycle.

– Perform digital design and conduct all RTL sign-off checks.

– Continuously enhance and optimize design methodologies and processes.

– Collaborate with IP Architects to break down requirements and create detailed IP architecture and design specifications.

– Work closely with verification engineers to review and refine verification plans.

– Build competence in the technical domain.

– Engage in cross-team collaboration to ensure successful project delivery.

You will bring :

Required Qualifications :

– Bachelors degree in electrical or computer engineering.

– 8+ years industry experience in ASIC IP Design

– Strong Experience in/with :

1. Understanding of ASIC technology, design environments, and methodologies.

2. IP development from concept (High-level Spec) to Micro-architecture, RTL creation and sign-off with SystemVerilog

3. RTL static sign-off tools such as SpyGlass

4. Understanding of Synthesis and Timing concepts.

5. Scripting languages like TCL, Python, or similar.

6. AMBA-based IP development using AXI and CHI.

7. SystemVerilog Assertions

Are you interested in this position?

Apply by clicking on the “Apply Now” button below!

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