Director / Principal Architect, AI Compiler & Infrastructure Optimization

Director

Director / Principal Architect, AI Compiler & Infrastructure Optimization

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  • Date posted
    July 13, 2026
  • Expiration date
    October 13, 2026
  • Application ends
    October 13, 2026

We are seeking a Director / Principal Architect to lead a high-caliber AI compiler and infrastructure optimization team. This role will define the technical vision and roadmap for compiler innovation, AI accelerator optimization, and high-performance AI infrastructure.

The successful candidate will lead a team of senior engineers, researchers, PhDs, and competition-level technical specialists, driving deep optimization across AI accelerator hardware and software ecosystems.

This is a senior technical leadership position for someone with strong expertise in AI compilers, accelerator architecture, performance engineering, and large-scale AI infrastructure.

Key Responsibilities

AI Compiler Innovation

Lead the development and optimization of production-grade AI compilers, with a focus on technologies such as Triton, MLIR, LLVM, and XLA.

Drive research and engineering in automatic tuning engines, graph compilation, kernel compilation, operator optimization, and advanced compiler back-end technologies for AI accelerator hardware.

Software Acceleration and Performance Tuning

Analyze and resolve performance bottlenecks for multimodal models and large language models on AI accelerator platforms.

Optimize across operators, kernels, memory access patterns, memory scheduling, graph execution, and runtime performance.

Research and apply advanced techniques including automatic tuning, operator fusion, graph optimization, memory optimization, scheduling optimization, and kernel-level acceleration.

Hardware-Software Co-Design

Lead deep technical analysis of modern AI accelerator architectures, including GPUs, NPUs, TPUs, and related systems.

Identify state-of-the-art compiler, runtime, and hardware acceleration techniques, and work closely with hardware and chip design teams to improve compute efficiency, memory layout, and overall system performance.

Contribute to hardware-software co-design efforts that push the theoretical and practical limits of AI compute and memory performance.

Ecosystem and Technical Influence

Benchmark internal technologies against leading global AI infrastructure platforms and industry best practices.

Contribute to open-source compiler and infrastructure ecosystems such as Triton, LLVM, MLIR, and related projects.

Represent the team externally through technical publications, open-source contributions, industry events, academic collaborations, and technical competitions.

Preferred Experience

Technical Leadership

More than 8 years of experience in system software, AI infrastructure, compiler engineering, high-performance computing, or related areas.

Proven experience leading high-performing engineering or research teams, ideally in advanced compiler development, AI accelerator optimization, or large-scale AI infrastructure.

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