Our Client Currently looking for ASIC / NoC Power and Solutions Senior/Staff Engineer

In your role, you will:
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Collaborate regularly with highly skilled experts across different teams (Architecture, Hardware, software, verification, emulation, …) to ensure our technology is used efficiently in SoCs
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Contribute to the definition of interconnect requirements and configuration in the various SoCs
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Provide support on power issues and technology of new solutions and general technical support
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Help resolve NoC power micro-architecture and NoC power unit integration issues
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Participate in defining new or improved power architectures and power NoC units and be responsible for their validation in our technology
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Develop in-depth technical material and organize training for different teams worldwide
Skills/Experience
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Strong understanding of overall SoC development flow: SoC architecture, RTL design and verification, SoC performance and DDR memory channel, physical implementation, silicon debug.
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Good knowledge in system level features such as memory-mapping, MMUs, Quality of service, cache infrastructure, security schemes, etc..
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Knowledge of low-power techniques in SoCs and experience of resolving power-related issues.
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Strong analytical skills for debug in simulation, emulation or silicon bring-up environments.
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Understand interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI and NoC concepts.
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Ability to quickly react and adapt to changes.
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Excellent communication skills.
Minimum Qualifications
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Master’s degree in Microelectronics, Computer Science, or related field.
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Preferably 3-5 years of solid experience in design, architecture and/or application engineering in SoC/ASIC development cycle.
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Standard SoC knowledge: Multimedia Ips, GPU, multi-core CPU architecture, Processors, Caches, memory controller, interconnects, … and related design, integration and verification challenges
Preferred Qualifications
One or multiple qualifications in the list below would be a great advantage:
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SoC high speed protocols and chiplet architectures
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Coherency protocols
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Functional Safety / ASIL standards (ISO26262)
Keywords
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SoC, ASIC, Deployment, Solutions Architect, Interconnect, Cache, CPU, GPU, Coherency, debug, power, functional safety

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